1. Technical Field
This disclosure relates to semiconductor fabrication and more particularly, to a method for rounding corners of silicon by employing an implantation process.
2. Description of the Related Art
Field effect transistors (FET) for semiconductor devices typically include a doped active area 10 where a channel 14 forms between a source 8 and a drain 11 of the FET as shown in FIGS. 1A and 1B. When a gate electrode 12 is activated under proper conditions, conduction of current between source and drain occurs through a channel 14 (shown in phantom lines) below the gate electrode 12. Isolation regions 16 are adjacent to the active area 10.
Sharp corners 18 at the edge of the active regions 10 formed by trenches 22 which provide a location for shallow trench isolation regions 16 can cause a low threshold voltage for the transistor. This results in the transistor being switched on at lower, undesirable voltages and or current leakage through the transistor. Corners 18 also promote gate oxide defects, which may result in voltage breakage of a gate oxide layer 24. These parasitic leakages due to the sharp corners reduce FET performance and lead to errors in data or malfunctions in the FET.
Therefore, a need exists for a method for rounding sharp corners in an active area region. A further need exists for a method for forming the rounded corners by employing ion implantation.